Coverage Report

Created: 2019-07-03 22:50

/home/liu/buildslave/linux-x64-runtests/build/lib/nnc/cmd/norm/ccv_nnc_batch_norm.c
Line
Count
Source (jump to first uncovered line)
1
#include <ccv.h>
2
#include <nnc/ccv_nnc.h>
3
#include <nnc/ccv_nnc_internal.h>
4
5
static int _ccv_nnc_batch_norm_forw_bitmask(const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
6
544
{
7
544
  // 5 inputs (x, scale, bias, mean, var)
8
544
  // 1 outputs (y)
9
544
  if (input_bitmasks[0] == 31u && 
output_bitmasks[0] == 1u144
)
10
0
    return 1;
11
544
  // 5 inputs (x, scale, bias, mean, var)
12
544
  // 5 outputs (y, mean, var, saved_mean, saved_inv_var)
13
544
  // Both mean and var in output is inplace for the input mean, var
14
544
  if (input_bitmasks[0] == 31u && 
output_bitmasks[0] == 31u144
)
15
80
    return 1;
16
464
  return 0;
17
464
}
18
19
static int _ccv_nnc_batch_norm_enforce_inplace(const int input_idx, const int input_size, const int output_idx, const int output_size)
20
2.07k
{
21
2.07k
  if (input_idx == 3 && 
output_idx == 1415
)
22
83
    return 1;
23
1.99k
  if (input_idx == 4 && 
output_idx == 2414
)
24
83
    return 1;
25
1.90k
  return 0;
26
1.90k
}
27
28
static int _ccv_nnc_batch_norm_back_bitmask(const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
29
473
{
30
473
  // 0b110000001100001
31
473
  // Inputs (gradient, 0, 0, 0, 0, x, scale, 0, 0, 0, 0, 0, 0, saved_mean, saved_inv_var)
32
473
  // Output the propagated error, dscale and dbias
33
473
  if ((input_bitmasks[0] & 24673u) == 24673u && 
(output_bitmasks[0] & 7u) == 7u273
)
34
273
    return 1;
35
200
  return 0;
36
200
}
37
38
static void _ccv_nnc_batch_norm_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* const inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* const outputs, const int output_size)
39
152
{
40
152
  assert(input_size == 5);
41
152
  assert(output_size == 1 || output_size == 5);
42
152
  outputs[0] = inputs[0];
43
152
  if (output_size == 1)
44
0
    return;
45
152
  int i, j;
46
760
  for (i = 1; i < output_size; 
i++608
)
47
608
  {
48
608
    outputs[i] = inputs[0];
49
2.43k
    for (j = 0; j < cmd.bnorm.count; 
j++1.82k
)
50
1.82k
      outputs[i].dim[cmd.bnorm.axis[j]] = 1; // Reduce the dimension to 1.
51
608
  }
52
152
}
53
54
static void _ccv_nnc_batch_norm_tensor_auto_back(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* const inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* const outputs, const int output_size)
55
85
{
56
85
  assert(input_size == 15);
57
85
  assert(output_size == 5);
58
85
  outputs[0] = inputs[0];
59
85
  int i, j;
60
425
  for (i = 1; i < output_size; 
i++340
)
61
340
  {
62
340
    outputs[i] = inputs[0];
63
1.36k
    for (j = 0; j < cmd.bnorm.count; 
j++1.02k
)
64
1.02k
      outputs[i].dim[cmd.bnorm.axis[j]] = 1; // Reduce the dimension to 1.
65
340
  }
66
85
}
67
68
REGISTER_COMMAND(CCV_NNC_BATCH_NORM_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
69
  FIND_BACKEND(ccv_nnc_batch_norm_cpu_ref.c, gpu/ccv_nnc_batch_norm_gpu_cudnn.cu)
70
1
{
71
1
  registry->bitmask = _ccv_nnc_batch_norm_forw_bitmask;
72
1
  registry->tensor_auto = _ccv_nnc_batch_norm_tensor_auto_forw;
73
1
  registry->enforce_inplace = _ccv_nnc_batch_norm_enforce_inplace;
74
1
}
75
76
REGISTER_COMMAND(CCV_NNC_BATCH_NORM_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
77
  FIND_BACKEND(ccv_nnc_batch_norm_cpu_ref.c, gpu/ccv_nnc_batch_norm_gpu_cudnn.cu)
78
1
{
79
1
  registry->bitmask = _ccv_nnc_batch_norm_back_bitmask;
80
1
  registry->tensor_auto = _ccv_nnc_batch_norm_tensor_auto_back;
81
1
}
82
83
//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_BATCH_NORM_FORWARD)
84
#define CMD_BATCH_NORM_FORWARD(_epsilon, _is_test, _momentum, ...) ccv_nnc_cmd(CCV_NNC_BATCH_NORM_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.bnorm={.epsilon=_epsilon,.is_test=_is_test,.momentum=_momentum,.count=LIST_COUNT(__VA_ARGS__),.axis={__VA_ARGS__}}}), 0)
85
//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_BATCH_NORM_BACKWARD)
86
#define CMD_BATCH_NORM_BACKWARD(_epsilon, _is_test, _momentum, ...) ccv_nnc_cmd(CCV_NNC_BATCH_NORM_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.bnorm={.epsilon=_epsilon,.is_test=_is_test,.momentum=_momentum,.count=LIST_COUNT(__VA_ARGS__),.axis={__VA_ARGS__}}}), 0)