Coverage Report

Created: 2019-07-03 22:50

/home/liu/buildslave/linux-x64-runtests/build/lib/nnc/cmd/relu/ccv_nnc_relu.c
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Count
Source
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#include <ccv.h>
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#include <nnc/ccv_nnc.h>
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#include <nnc/ccv_nnc_internal.h>
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static int _ccv_nnc_relu_allow_first_replace(const int input_idx, const int input_size, const int output_idx, const int output_size)
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{
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  return input_idx == 0 && 
output_idx == 0185
;
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}
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static int _ccv_nnc_relu_forw_bitmask(const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
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{
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  if ((input_bitmasks[0] & 1u) == 1u && 
output_bitmasks[0] == 1u40
)
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    return 1;
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  return 0;
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}
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static int _ccv_nnc_relu_back_bitmask(const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
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{
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  if ((input_bitmasks[0] & 5u) == ((1u << 0) | (1u << 2)) && 
output_bitmasks[0] == 1u80
)
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    return 1;
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  return 0;
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}
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REGISTER_COMMAND(CCV_NNC_RELU_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_relu_cpu_ref.c, gpu/ccv_nnc_relu_gpu_cudnn.cu)
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1
{
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1
  registry->bitmask = _ccv_nnc_relu_forw_bitmask;
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1
  registry->tensor_auto = ccv_nnc_hint_tensor_auto_forward_from_inputs;
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  registry->allow_inplace = _ccv_nnc_relu_allow_first_replace;
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1
}
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REGISTER_COMMAND(CCV_NNC_RELU_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_relu_cpu_ref.c, gpu/ccv_nnc_relu_gpu_cudnn.cu)
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1
{
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1
  registry->bitmask = _ccv_nnc_relu_back_bitmask;
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1
  registry->tensor_auto = ccv_nnc_hint_tensor_auto_backward_from_gradient;
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1
  registry->allow_inplace = _ccv_nnc_relu_allow_first_replace;
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1
}
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_RELU_FORWARD)
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#define CMD_RELU_FORWARD() ccv_nnc_cmd(CCV_NNC_RELU_FORWARD, 0, ccv_nnc_cmd_auto, 0)
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_RELU_BACKWARD)
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#define CMD_RELU_BACKWARD() ccv_nnc_cmd(CCV_NNC_RELU_BACKWARD, 0, ccv_nnc_cmd_auto, 0)