Coverage Report

Created: 2019-07-03 22:50

/home/liu/buildslave/linux-x64-runtests/build/test/unit/nnc/transform.tests.c
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Count
Source
1
#include "case.h"
2
#include "ccv_case.h"
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#include "ccv_nnc_case.h"
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#include <ccv.h>
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#include <nnc/ccv_nnc.h>
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#include <nnc/ccv_nnc_easy.h>
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#include <3rdparty/dsfmt/dSFMT.h>
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TEST_SETUP()
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{
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  ccv_nnc_init();
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}
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14
TEST_CASE("data transfer between different tensor views")
15
1
{
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1
  ccv_nnc_tensor_t* a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 56, 56, 128), 0);
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1
  ccv_nnc_tensor_t* b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 24, 32, 64), 0);
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1
  ccv_nnc_cmd_t cmd = CMD_DATA_TRANSFER_FORWARD();
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1
  int i;
20
401k
  for (i = 0; i < 128 * 56 * 56; 
i++401k
)
21
401k
    a->data.f32[i] = i;
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1
  // 6 values, manageable.
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1
  ccv_nnc_tensor_view_t a_view = ccv_nnc_tensor_view(a, DIM_ALLOC(2, 3, 4), DIM_ALLOC(4, 3, 2), a->info.dim);
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1
  ccv_nnc_tensor_view_t b_view = ccv_nnc_tensor_view(b, DIM_ALLOC(2, 3, 4), DIM_ALLOC(0, 0, 0), b->info.dim);
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1
  memset(b->data.f32, 0, sizeof(float) * 64 * 32 * 24);
26
1
  ccv_nnc_cmd_exec(cmd, ccv_nnc_no_hint, 0, TENSOR_LIST((ccv_nnc_tensor_t*)&a_view), TENSOR_LIST((ccv_nnc_tensor_t*)&b_view), 0);
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1
  ccv_nnc_tensor_t* c = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 24, 32, 64), 0);
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1
  memset(c->data.f32, 0, sizeof(float) * 64 * 32 * 24);
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1
  c->data.f32[0] = 128 * 56 * 4 + 128 * 3 + 2;
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1
  c->data.f32[1] = 128 * 56 * 4 + 128 * 3 + 3;
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1
  c->data.f32[2] = 128 * 56 * 4 + 128 * 3 + 4;
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1
  c->data.f32[3] = 128 * 56 * 4 + 128 * 3 + 5;
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1
  c->data.f32[64] = 128 * 56 * 4 + 128 * (3 + 1) + 2;
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1
  c->data.f32[65] = 128 * 56 * 4 + 128 * (3 + 1) + 3;
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1
  c->data.f32[66] = 128 * 56 * 4 + 128 * (3 + 1) + 4;
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1
  c->data.f32[67] = 128 * 56 * 4 + 128 * (3 + 1) + 5;
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1
  c->data.f32[128] = 128 * 56 * 4 + 128 * (3 + 2) + 2;
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1
  c->data.f32[129] = 128 * 56 * 4 + 128 * (3 + 2) + 3;
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1
  c->data.f32[130] = 128 * 56 * 4 + 128 * (3 + 2) + 4;
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1
  c->data.f32[131] = 128 * 56 * 4 + 128 * (3 + 2) + 5;
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1
  c->data.f32[64 * 32] = 128 * 56 * (4 + 1) + 128 * 3 + 2;
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1
  c->data.f32[64 * 32 + 1] = 128 * 56 * (4 + 1) + 128 * 3 + 3;
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1
  c->data.f32[64 * 32 + 2] = 128 * 56 * (4 + 1) + 128 * 3 + 4;
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1
  c->data.f32[64 * 32 + 3] = 128 * 56 * (4 + 1) + 128 * 3 + 5;
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1
  c->data.f32[64 * 32 + 64] = 128 * 56 * (4 + 1) + 128 * (3 + 1) + 2;
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1
  c->data.f32[64 * 32 + 65] = 128 * 56 * (4 + 1) + 128 * (3 + 1) + 3;
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1
  c->data.f32[64 * 32 + 66] = 128 * 56 * (4 + 1) + 128 * (3 + 1) + 4;
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1
  c->data.f32[64 * 32 + 67] = 128 * 56 * (4 + 1) + 128 * (3 + 1) + 5;
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1
  c->data.f32[64 * 32 + 128] = 128 * 56 * (4 + 1) + 128 * (3 + 2) + 2;
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1
  c->data.f32[64 * 32 + 129] = 128 * 56 * (4 + 1) + 128 * (3 + 2) + 3;
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1
  c->data.f32[64 * 32 + 130] = 128 * 56 * (4 + 1) + 128 * (3 + 2) + 4;
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1
  c->data.f32[64 * 32 + 131] = 128 * 56 * (4 + 1) + 128 * (3 + 2) + 5;
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1
  REQUIRE_TENSOR_EQ(b, c, "64x32x24 tensor should be exactly the same.");
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1
  ccv_nnc_tensor_free(a);
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1
  ccv_nnc_tensor_free(b);
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1
  ccv_nnc_tensor_free(c);
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1
}
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TEST_CASE("format transform between NHWC and NCHW tensors")
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1
{
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1
  ccv_nnc_tensor_t* a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 4, 3, 2), 0);
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1
  ccv_nnc_tensor_t* b = ccv_nnc_tensor_new(0, CPU_TENSOR_NCHW(32F, 2, 4, 3), 0);
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1
  ccv_nnc_cmd_t cmd = CMD_FORMAT_TRANSFORM_FORWARD();
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1
  int i;
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25
  for (i = 0; i < 2 * 3 * 4; 
i++24
)
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24
    a->data.f32[i] = i;
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1
  ccv_nnc_cmd_exec(cmd, ccv_nnc_no_hint, 0, TENSOR_LIST(a), TENSOR_LIST(b), 0);
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1
  ccv_nnc_tensor_t* c = ccv_nnc_tensor_new(0, CPU_TENSOR_NCHW(32F, 2, 4, 3), 0);
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1
  c->data.f32[0] = 0;
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1
  c->data.f32[1] = 2;
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1
  c->data.f32[2] = 4;
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1
  c->data.f32[3] = 6;
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1
  c->data.f32[4] = 8;
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1
  c->data.f32[5] = 10;
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1
  c->data.f32[6] = 12;
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1
  c->data.f32[7] = 14;
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1
  c->data.f32[8] = 16;
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1
  c->data.f32[9] = 18;
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1
  c->data.f32[10] = 20;
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1
  c->data.f32[11] = 22;
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1
  c->data.f32[12] = 1;
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1
  c->data.f32[13] = 3;
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1
  c->data.f32[14] = 5;
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1
  c->data.f32[15] = 7;
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1
  c->data.f32[16] = 9;
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1
  c->data.f32[17] = 11;
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1
  c->data.f32[18] = 13;
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1
  c->data.f32[19] = 15;
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1
  c->data.f32[20] = 17;
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1
  c->data.f32[21] = 19;
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1
  c->data.f32[22] = 21;
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1
  c->data.f32[23] = 23;
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1
  REQUIRE_TENSOR_EQ(b, c, "3x4x2 tensor should be exactly the same.");
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1
  ccv_nnc_tensor_t* d = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 4, 3, 2), 0);
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1
  ccv_nnc_cmd_exec(cmd, ccv_nnc_no_hint, 0, TENSOR_LIST(c), TENSOR_LIST(d), 0);
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1
  REQUIRE_TENSOR_EQ(d, a, "2x3x4 tensor should be exactly the same.");
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1
  ccv_nnc_tensor_free(a);
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1
  ccv_nnc_tensor_free(b);
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1
  ccv_nnc_tensor_free(c);
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1
  ccv_nnc_tensor_free(d);
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1
}
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TEST_CASE("format transform between NHWC and NCHW tensor views")
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1
{
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1
  ccv_nnc_tensor_t* a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 7, 6, 5), 0);
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1
  ccv_nnc_tensor_view_t a_view = ccv_nnc_tensor_view(a, DIM_ALLOC(4, 3, 2), DIM_ALLOC(3, 2, 1), a->info.dim);
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1
  memset(a->data.f32, 0, sizeof(float) * 5 * 6 * 7);
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1
  ccv_nnc_tensor_t* b = ccv_nnc_tensor_new(0, CPU_TENSOR_NCHW(32F, 8, 10, 8), 0);
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1
  memset(b->data.f32, 0, sizeof(float) * 8 * 10 * 8);
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1
  ccv_nnc_tensor_view_t b_view = ccv_nnc_tensor_view(b, DIM_ALLOC(2, 4, 3), DIM_ALLOC(0, 0, 0), b->info.dim);
111
1
  ccv_nnc_cmd_t cmd = CMD_FORMAT_TRANSFORM_FORWARD();
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1
  int i, j, k;
113
5
  for (i = 0; i < 4; 
i++4
)
114
16
    
for (j = 0; 4
j < 3;
j++12
)
115
36
      
for (k = 0; 12
k < 2;
k++24
)
116
24
        a->data.f32[(i + 3) * 5 * 6 + (j + 2) * 5 + (k + 1)] = k + j * 2 + i * 3 * 2;
117
1
  ccv_nnc_cmd_exec(cmd, ccv_nnc_no_hint, 0, TENSOR_LIST((ccv_nnc_tensor_t*)&a_view), TENSOR_LIST((ccv_nnc_tensor_t*)&b_view), 0);
118
1
  ccv_nnc_tensor_t* c = ccv_nnc_tensor_new(0, CPU_TENSOR_NCHW(32F, 8, 10, 8), 0);
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1
  memset(c->data.f32, 0, sizeof(float) * 8 * 10 * 8);
120
1
  c->data.f32[0] = 0;
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1
  c->data.f32[1] = 2;
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1
  c->data.f32[2] = 4;
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1
  c->data.f32[8] = 6;
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1
  c->data.f32[9] = 8;
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1
  c->data.f32[10] = 10;
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1
  c->data.f32[16] = 12;
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1
  c->data.f32[17] = 14;
128
1
  c->data.f32[18] = 16;
129
1
  c->data.f32[24] = 18;
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1
  c->data.f32[25] = 20;
131
1
  c->data.f32[26] = 22;
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1
  c->data.f32[80] = 1;
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1
  c->data.f32[81] = 3;
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1
  c->data.f32[82] = 5;
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1
  c->data.f32[88] = 7;
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1
  c->data.f32[89] = 9;
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1
  c->data.f32[90] = 11;
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1
  c->data.f32[96] = 13;
139
1
  c->data.f32[97] = 15;
140
1
  c->data.f32[98] = 17;
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1
  c->data.f32[104] = 19;
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1
  c->data.f32[105] = 21;
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1
  c->data.f32[106] = 23;
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1
  REQUIRE_TENSOR_EQ(b, c, "3x4x2 tensor view should be exactly the same.");
145
1
  ccv_nnc_tensor_view_t c_view = ccv_nnc_tensor_view(c, DIM_ALLOC(2, 4, 3), DIM_ALLOC(0, 0, 0), c->info.dim);
146
1
  ccv_nnc_tensor_t* d = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 7, 6, 5), 0);
147
1
  memset(d->data.f32, 0, sizeof(float) * 5 * 6 * 7);
148
1
  ccv_nnc_tensor_view_t d_view = ccv_nnc_tensor_view(d, DIM_ALLOC(4, 3, 2), DIM_ALLOC(3, 2, 1), d->info.dim);
149
1
  ccv_nnc_cmd_exec(cmd, ccv_nnc_no_hint, 0, TENSOR_LIST((ccv_nnc_tensor_t*)&c_view), TENSOR_LIST((ccv_nnc_tensor_t*)&d_view), 0);
150
1
  REQUIRE_TENSOR_EQ(d, a, "2x3x4 tensor should be exactly the same.");
151
1
  ccv_nnc_tensor_free(a);
152
1
  ccv_nnc_tensor_free(b);
153
1
  ccv_nnc_tensor_free(c);
154
1
  ccv_nnc_tensor_free(d);
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1
}
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#include "case_main.h"