Coverage Report

Created: 2021-04-12 03:25

/home/liu/buildslave/linux-x64-runtests/build/test/int/nnc/index.tests.c
Line
Count
Source
1
#include "case.h"
2
#include "ccv_case.h"
3
#include "ccv_nnc_case.h"
4
#include <ccv.h>
5
#include <nnc/ccv_nnc.h>
6
#include <nnc/ccv_nnc_easy.h>
7
#include <3rdparty/dsfmt/dSFMT.h>
8
9
TEST_SETUP()
10
{
11
  ccv_nnc_init();
12
}
13
14
TEST_CASE("index select a tensor")
15
1
{
16
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_FORWARD, CCV_NNC_BACKEND_GPU_REF));
17
1
  float ap[] = {
18
1
    1, 2,
19
1
    2, 3,
20
1
    3, 4,
21
1
  };
22
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(ap, CPU_TENSOR_NHWC(32F, 3, 2), 0);
23
1
  int ip[] = {1, 1};
24
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(ip, CPU_TENSOR_NHWC(32S, 2), 0);
25
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 2, 2), 0);
26
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 3, 2), 0);
27
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 2), 0);
28
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 2, 2), 0);
29
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a, indices), TENSOR_LIST(ga, gindices), 0);
30
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga, gindices), TENSOR_LIST(gb), 0);
31
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb), TENSOR_LIST(b), 0);
32
1
  float btp[] = {
33
1
    2, 3,
34
1
    2, 3,
35
1
  };
36
1
  ccv_nnc_tensor_t const bt = ccv_nnc_tensor(btp, CPU_TENSOR_NHWC(32F, 2, 2), 0);
37
1
  REQUIRE_TENSOR_EQ(b, &bt, "should be equal");
38
1
  ccv_nnc_tensor_free(a);
39
1
  ccv_nnc_tensor_free(indices);
40
1
  ccv_nnc_tensor_free(b);
41
1
  ccv_nnc_tensor_free(ga);
42
1
  ccv_nnc_tensor_free(gindices);
43
1
  ccv_nnc_tensor_free(gb);
44
1
}
45
46
TEST_CASE("index select a 1d tensor")
47
1
{
48
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_FORWARD, CCV_NNC_BACKEND_GPU_REF));
49
1
  float ap[] = {
50
1
    1, 2, 3, 4, 5
51
1
  };
52
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(ap, CPU_TENSOR_NHWC(32F, 5), 0);
53
1
  int ip[] = {3, 2, 4};
54
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(ip, CPU_TENSOR_NHWC(32S, 3), 0);
55
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 3), 0);
56
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 5), 0);
57
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 3), 0);
58
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 3), 0);
59
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a, indices), TENSOR_LIST(ga, gindices), 0);
60
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga, gindices), TENSOR_LIST(gb), 0);
61
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb), TENSOR_LIST(b), 0);
62
1
  float btp[] = {
63
1
    4, 3, 5
64
1
  };
65
1
  ccv_nnc_tensor_t const bt = ccv_nnc_tensor(btp, CPU_TENSOR_NHWC(32F, 3), 0);
66
1
  REQUIRE_TENSOR_EQ(b, &bt, "should be equal");
67
1
  ccv_nnc_tensor_free(a);
68
1
  ccv_nnc_tensor_free(indices);
69
1
  ccv_nnc_tensor_free(b);
70
1
  ccv_nnc_tensor_free(ga);
71
1
  ccv_nnc_tensor_free(gindices);
72
1
  ccv_nnc_tensor_free(gb);
73
1
}
74
75
TEST_CASE("index select a tensor view")
76
1
{
77
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_FORWARD, CCV_NNC_BACKEND_GPU_REF));
78
1
  float ap[] = {
79
1
    1, 2, 3, 4,
80
1
    2, 3, 4, 5,
81
1
    3, 4, 5, 6,
82
1
  };
83
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(ap, CPU_TENSOR_NHWC(32F, 3, 4), 0);
84
1
  ccv_nnc_tensor_view_t* const av = ccv_nnc_tensor_view_new(a, CPU_TENSOR_NHWC(32F, 3, 2), DIM_ALLOC(0, 1), DIM_ALLOC(3, 4));
85
1
  int ip[] = {1, 1};
86
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(ip, CPU_TENSOR_NHWC(32S, 2), 0);
87
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 2, 4), 0);
88
1
  memset(b->data.f32, 0, 2 * 4 * sizeof(float));
89
1
  ccv_nnc_tensor_view_t* const bv = ccv_nnc_tensor_view_new(b, CPU_TENSOR_NHWC(32F, 2, 2), DIM_ALLOC(0, 1), DIM_ALLOC(2, 4));
90
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 3, 4), 0);
91
1
  ccv_nnc_tensor_view_t* const gav = ccv_nnc_tensor_view_new(ga, GPU_TENSOR_NHWC(000, 32F, 3, 2), DIM_ALLOC(0, 1), DIM_ALLOC(3, 4));
92
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 2), 0);
93
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 2, 4), 0);
94
1
  ccv_nnc_tensor_view_t* const gbv = ccv_nnc_tensor_view_new(gb, GPU_TENSOR_NHWC(000, 32F, 2, 2), DIM_ALLOC(0, 1), DIM_ALLOC(2, 4));
95
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a, indices, b), TENSOR_LIST(ga, gindices, gb), 0);
96
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST((ccv_nnc_tensor_t*)gav, gindices), TENSOR_LIST((ccv_nnc_tensor_t*)gbv), 0);
97
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb), TENSOR_LIST(b), 0);
98
1
  float btp[] = {
99
1
    0, 3, 4, 0,
100
1
    0, 3, 4, 0,
101
1
  };
102
1
  ccv_nnc_tensor_t const bt = ccv_nnc_tensor(btp, CPU_TENSOR_NHWC(32F, 2, 4), 0);
103
1
  REQUIRE_TENSOR_EQ(b, &bt, "should be equal");
104
1
  ccv_nnc_tensor_free(a);
105
1
  ccv_nnc_tensor_view_free(av);
106
1
  ccv_nnc_tensor_free(indices);
107
1
  ccv_nnc_tensor_free(b);
108
1
  ccv_nnc_tensor_view_free(bv);
109
1
  ccv_nnc_tensor_free(ga);
110
1
  ccv_nnc_tensor_view_free(gav);
111
1
  ccv_nnc_tensor_free(gindices);
112
1
  ccv_nnc_tensor_free(gb);
113
1
  ccv_nnc_tensor_view_free(gbv);
114
1
}
115
116
TEST_CASE("backward index select a tensor")
117
1
{
118
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_BACKWARD, CCV_NNC_BACKEND_GPU_REF));
119
1
  float bp[] = {
120
1
    1, 2,
121
1
    2, 3,
122
1
  };
123
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 3, 2), 0);
124
1
  int ip[] = {1, 1};
125
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(ip, CPU_TENSOR_NHWC(32S, 2), 0);
126
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(bp, CPU_TENSOR_NHWC(32F, 2, 2), 0);
127
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 3, 2), 0);
128
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 2), 0);
129
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 2, 2), 0);
130
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(b, indices), TENSOR_LIST(gb, gindices), 0);
131
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_BACKWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb, 0, gindices), TENSOR_LIST(ga), 0);
132
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga), TENSOR_LIST(a), 0);
133
1
  float atp[] = {
134
1
    0, 0,
135
1
    3, 5,
136
1
    0, 0,
137
1
  };
138
1
  ccv_nnc_tensor_t const at = ccv_nnc_tensor(atp, CPU_TENSOR_NHWC(32F, 3, 2), 0);
139
1
  REQUIRE_TENSOR_EQ(a, &at, "should be equal");
140
1
  ccv_nnc_tensor_free(a);
141
1
  ccv_nnc_tensor_free(indices);
142
1
  ccv_nnc_tensor_free(b);
143
1
  ccv_nnc_tensor_free(ga);
144
1
  ccv_nnc_tensor_free(gindices);
145
1
  ccv_nnc_tensor_free(gb);
146
1
}
147
148
TEST_CASE("backward index select a 1d tensor")
149
1
{
150
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_BACKWARD, CCV_NNC_BACKEND_GPU_REF));
151
1
  float bp[] = {
152
1
    4, 3, 5,
153
1
  };
154
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 5), 0);
155
1
  int ip[] = {3, 2, 4};
156
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(ip, CPU_TENSOR_NHWC(32S, 3), 0);
157
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(bp, CPU_TENSOR_NHWC(32F, 3), 0);
158
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 5), 0);
159
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 3), 0);
160
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 3), 0);
161
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(b, indices), TENSOR_LIST(gb, gindices), 0);
162
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_BACKWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb, 0, gindices), TENSOR_LIST(ga), 0);
163
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga), TENSOR_LIST(a), 0);
164
1
  float atp[] = {
165
1
    0, 0, 3, 4, 5
166
1
  };
167
1
  ccv_nnc_tensor_t const at = ccv_nnc_tensor(atp, CPU_TENSOR_NHWC(32F, 5), 0);
168
1
  REQUIRE_TENSOR_EQ(a, &at, "should be equal");
169
1
  ccv_nnc_tensor_free(a);
170
1
  ccv_nnc_tensor_free(indices);
171
1
  ccv_nnc_tensor_free(b);
172
1
  ccv_nnc_tensor_free(ga);
173
1
  ccv_nnc_tensor_free(gindices);
174
1
  ccv_nnc_tensor_free(gb);
175
1
}
176
177
TEST_CASE("backward index select a tensor view")
178
1
{
179
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_BACKWARD, CCV_NNC_BACKEND_GPU_REF));
180
1
  float bp[] = {
181
1
    0, 3, 4, 0,
182
1
    0, 1, 5, 0,
183
1
  };
184
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 3, 4), 0);
185
1
  int i;
186
13
  for (i = 0; i < 3 * 4; 
i++12
)
187
12
    a->data.f32[i] = i;
188
1
  ccv_nnc_tensor_view_t* const av = ccv_nnc_tensor_view_new(a, CPU_TENSOR_NHWC(32F, 3, 2), DIM_ALLOC(0, 1), DIM_ALLOC(3, 4));
189
1
  int ip[] = {1, 1};
190
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(ip, CPU_TENSOR_NHWC(32S, 2), 0);
191
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(bp, CPU_TENSOR_NHWC(32F, 2, 4), 0);
192
1
  ccv_nnc_tensor_view_t* const bv = ccv_nnc_tensor_view_new(b, CPU_TENSOR_NHWC(32F, 2, 2), DIM_ALLOC(0, 1), DIM_ALLOC(2, 4));
193
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 3, 4), 0);
194
1
  ccv_nnc_tensor_view_t* const gav = ccv_nnc_tensor_view_new(ga, GPU_TENSOR_NHWC(000, 32F, 3, 2), DIM_ALLOC(0, 1), DIM_ALLOC(3, 4));
195
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 2), 0);
196
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 2, 4), 0);
197
1
  ccv_nnc_tensor_view_t* const gbv = ccv_nnc_tensor_view_new(gb, GPU_TENSOR_NHWC(000, 32F, 2, 2), DIM_ALLOC(0, 1), DIM_ALLOC(2, 4));
198
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a, indices, b), TENSOR_LIST(ga, gindices, gb), 0);
199
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_BACKWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST((ccv_nnc_tensor_t*)gbv, 0, gindices), TENSOR_LIST((ccv_nnc_tensor_t*)gav), 0);
200
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga), TENSOR_LIST(a), 0);
201
1
  float atp[] = {
202
1
    0, 0, 0, 3,
203
1
    4, 4, 9, 7,
204
1
    8, 0, 0, 11,
205
1
  };
206
1
  ccv_nnc_tensor_t const at = ccv_nnc_tensor(atp, CPU_TENSOR_NHWC(32F, 3, 4), 0);
207
1
  REQUIRE_TENSOR_EQ(a, &at, "should be equal");
208
1
  ccv_nnc_tensor_free(a);
209
1
  ccv_nnc_tensor_view_free(av);
210
1
  ccv_nnc_tensor_free(indices);
211
1
  ccv_nnc_tensor_free(b);
212
1
  ccv_nnc_tensor_view_free(bv);
213
1
  ccv_nnc_tensor_free(ga);
214
1
  ccv_nnc_tensor_view_free(gav);
215
1
  ccv_nnc_tensor_free(gindices);
216
1
  ccv_nnc_tensor_free(gb);
217
1
  ccv_nnc_tensor_view_free(gbv);
218
1
}
219
220
TEST_CASE("index select forward with half precision")
221
1
{
222
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_FORWARD, CCV_NNC_BACKEND_GPU_REF));
223
1
  dsfmt_t dsfmt;
224
1
  dsfmt_init_gen_rand(&dsfmt, 0);
225
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 100, 10), 0);
226
1
  int i;
227
1.00k
  for (i = 0; i < 100 * 10; 
i++1.00k
)
228
1.00k
    a->data.f32[i] = dsfmt_genrand_open_close(&dsfmt);
229
1
  ccv_nnc_tensor_t* const a16 = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(16F, 100, 10), 0);
230
1
  ccv_nnc_cmd_exec(CMD_DATATYPE_CONVERSION_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a), TENSOR_LIST(a16), 0);
231
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32S, 10), 0);
232
11
  for (i = 0; i < 10; 
i++10
)
233
10
    indices->data.i32[i] = i * 9 + 1;
234
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(16F, 10, 10), 0);
235
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 16F, 100, 10), 0);
236
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 10), 0);
237
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 16F, 10, 10), 0);
238
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a16, indices), TENSOR_LIST(ga, gindices), 0);
239
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga, gindices), TENSOR_LIST(gb), 0);
240
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb), TENSOR_LIST(b), 0);
241
1
  ccv_nnc_tensor_t* const bt = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(16F, 10, 10), 0);
242
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a16, indices), TENSOR_LIST(bt), 0);
243
1
  ccv_nnc_tensor_t* const b32 = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 10), 0);
244
1
  ccv_nnc_tensor_t* const bt32 = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 10), 0);
245
1
  ccv_nnc_cmd_exec(CMD_DATATYPE_CONVERSION_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(b, bt), TENSOR_LIST(b32, bt32), 0);
246
1
  REQUIRE_TENSOR_EQ(b32, bt32, "should be equal");
247
1
  ccv_nnc_tensor_free(a);
248
1
  ccv_nnc_tensor_free(indices);
249
1
  ccv_nnc_tensor_free(b);
250
1
  ccv_nnc_tensor_free(ga);
251
1
  ccv_nnc_tensor_free(gindices);
252
1
  ccv_nnc_tensor_free(gb);
253
1
  ccv_nnc_tensor_free(a16);
254
1
  ccv_nnc_tensor_free(bt);
255
1
  ccv_nnc_tensor_free(b32);
256
1
  ccv_nnc_tensor_free(bt32);
257
1
}
258
259
TEST_CASE("index select backward with half precision")
260
1
{
261
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_INDEX_SELECT_BACKWARD, CCV_NNC_BACKEND_GPU_REF));
262
1
  dsfmt_t dsfmt;
263
1
  dsfmt_init_gen_rand(&dsfmt, 0);
264
1
  ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 10), 0);
265
1
  int i;
266
101
  for (i = 0; i < 10 * 10; 
i++100
)
267
100
    a->data.f32[i] = dsfmt_genrand_open_close(&dsfmt);
268
1
  ccv_nnc_tensor_t* const a16 = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(16F, 10, 10), 0);
269
1
  ccv_nnc_cmd_exec(CMD_DATATYPE_CONVERSION_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a), TENSOR_LIST(a16), 0);
270
1
  ccv_nnc_tensor_t* const indices = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32S, 10), 0);
271
11
  for (i = 0; i < 10; 
i++10
)
272
10
    indices->data.i32[i] = i * 9 + 1;
273
1
  ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(16F, 100, 10), 0);
274
1
  ccv_nnc_tensor_t* const ga = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 16F, 10, 10), 0);
275
1
  ccv_nnc_tensor_t* const gindices = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32S, 10), 0);
276
1
  ccv_nnc_tensor_t* const gb = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 16F, 100, 10), 0);
277
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a16, indices), TENSOR_LIST(ga, gindices), 0);
278
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_BACKWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ga, 0, gindices), TENSOR_LIST(gb), 0);
279
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(gb), TENSOR_LIST(b), 0);
280
1
  ccv_nnc_tensor_t* const bt = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(16F, 100, 10), 0);
281
1
  ccv_nnc_cmd_exec(CMD_INDEX_SELECT_BACKWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(a16, 0, indices), TENSOR_LIST(bt), 0);
282
1
  ccv_nnc_tensor_t* const b32 = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 100, 10), 0);
283
1
  ccv_nnc_tensor_t* const bt32 = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 100, 10), 0);
284
1
  ccv_nnc_cmd_exec(CMD_DATATYPE_CONVERSION_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(b, bt), TENSOR_LIST(b32, bt32), 0);
285
1
  REQUIRE_TENSOR_EQ(b32, bt32, "should be equal");
286
1
  ccv_nnc_tensor_free(a);
287
1
  ccv_nnc_tensor_free(indices);
288
1
  ccv_nnc_tensor_free(b);
289
1
  ccv_nnc_tensor_free(ga);
290
1
  ccv_nnc_tensor_free(gindices);
291
1
  ccv_nnc_tensor_free(gb);
292
1
  ccv_nnc_tensor_free(a16);
293
1
  ccv_nnc_tensor_free(bt);
294
1
  ccv_nnc_tensor_free(b32);
295
1
  ccv_nnc_tensor_free(bt32);
296
1
}
297
298
#include "case_main.h"