Coverage Report

Created: 2024-06-09 22:30

/home/liu/actions-runner/_work/ccv/ccv/test/int/nnc/smooth_l1.tests.c
Line
Count
Source
1
#include "case.h"
2
#include "ccv_case.h"
3
#include "ccv_nnc_case.h"
4
#include <ccv.h>
5
#include <nnc/ccv_nnc.h>
6
#include <nnc/ccv_nnc_easy.h>
7
#include <3rdparty/dsfmt/dSFMT.h>
8
9
TEST_SETUP()
10
{
11
  ccv_nnc_init();
12
}
13
14
TEST_CASE("smooth l1 loss forward")
15
1
{
16
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_SMOOTH_L1_FORWARD, CCV_NNC_BACKEND_GPU_REF));
17
1
  ccv_nnc_tensor_t* a = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
18
1
  ccv_nnc_tensor_t* b = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
19
1
  ccv_nnc_tensor_t* c = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10), 0);
20
1
  ccv_nnc_tensor_t* ha = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
21
1
  ccv_nnc_tensor_t* hb = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
22
1
  ccv_nnc_tensor_t* hc = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10), 0);
23
1
  dsfmt_t dsfmt;
24
1
  dsfmt_init_gen_rand(&dsfmt, 0);
25
1
  int i;
26
1.00k
  for (i = 0; i < 1000; 
i++1.00k
)
27
1.00k
    ha->data.f32[i] = dsfmt_genrand_open_close(&dsfmt) * 0.01;
28
1.00k
  for (i = 0; i < 1000; 
i++1.00k
)
29
1.00k
    hb->data.f32[i] = 0;
30
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ha, hb), TENSOR_LIST(a, b), 0);
31
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_FORWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(ha, hb), TENSOR_LIST(hc), 0);
32
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_FORWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(a, b), TENSOR_LIST(c), 0);
33
1
  ccv_nnc_tensor_t* tc = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10), 0);
34
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(c), TENSOR_LIST(tc), 0);
35
1
  REQUIRE_TENSOR_EQ(tc, hc, "GPU computed output should be the same as CPU computed ones");
36
1
  ccv_nnc_tensor_free(a);
37
1
  ccv_nnc_tensor_free(b);
38
1
  ccv_nnc_tensor_free(c);
39
1
  ccv_nnc_tensor_free(ha);
40
1
  ccv_nnc_tensor_free(hb);
41
1
  ccv_nnc_tensor_free(hc);
42
1
  ccv_nnc_tensor_free(tc);
43
1
}
44
45
TEST_CASE("smooth l1 loss backward")
46
1
{
47
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_SMOOTH_L1_FORWARD, CCV_NNC_BACKEND_GPU_REF) &&
48
1
    ccv_nnc_cmd_ok(CCV_NNC_SMOOTH_L1_BACKWARD, CCV_NNC_BACKEND_GPU_REF));
49
1
  ccv_nnc_tensor_t* a = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
50
1
  ccv_nnc_tensor_t* b = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
51
1
  ccv_nnc_tensor_t* c = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10), 0);
52
1
  ccv_nnc_tensor_t* d = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
53
1
  ccv_nnc_tensor_t* g = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10), 0);
54
1
  ccv_nnc_tensor_t* ha = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
55
1
  ccv_nnc_tensor_t* hb = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
56
1
  ccv_nnc_tensor_t* hc = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10), 0);
57
1
  ccv_nnc_tensor_t* hd = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
58
1
  ccv_nnc_tensor_t* hg = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10), 0);
59
1
  dsfmt_t dsfmt;
60
1
  dsfmt_init_gen_rand(&dsfmt, 0);
61
1
  int i;
62
1.00k
  for (i = 0; i < 1000; 
i++1.00k
)
63
1.00k
    ha->data.f32[i] = dsfmt_genrand_open_close(&dsfmt) * 0.01;
64
1.00k
  for (i = 0; i < 1000; 
i++1.00k
)
65
1.00k
    hb->data.f32[i] = 0;
66
11
  for (i = 0; i < 10; 
i++10
)
67
10
    hg->data.f32[i] = 1;
68
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ha, hb, hg), TENSOR_LIST(a, b, g), 0);
69
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_FORWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(ha, hb), TENSOR_LIST(hc), 0);
70
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_BACKWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(hg, ha, hb, hc), TENSOR_LIST(hd), 0);
71
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_FORWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(a, b), TENSOR_LIST(c), 0);
72
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_BACKWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(g, a, b, c), TENSOR_LIST(d), 0);
73
1
  ccv_nnc_tensor_t* td = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
74
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(d), TENSOR_LIST(td), 0);
75
1
  REQUIRE_TENSOR_EQ(td, hd, "GPU computed output should be the same as CPU computed ones");
76
1
  ccv_nnc_tensor_free(a);
77
1
  ccv_nnc_tensor_free(b);
78
1
  ccv_nnc_tensor_free(c);
79
1
  ccv_nnc_tensor_free(d);
80
1
  ccv_nnc_tensor_free(g);
81
1
  ccv_nnc_tensor_free(ha);
82
1
  ccv_nnc_tensor_free(hb);
83
1
  ccv_nnc_tensor_free(hc);
84
1
  ccv_nnc_tensor_free(hd);
85
1
  ccv_nnc_tensor_free(hg);
86
1
  ccv_nnc_tensor_free(td);
87
1
}
88
89
TEST_CASE("smooth l1 loss backward no input gradient")
90
1
{
91
1
  GUARD_ELSE_RETURN(ccv_nnc_cmd_ok(CCV_NNC_SMOOTH_L1_FORWARD, CCV_NNC_BACKEND_GPU_REF) &&
92
1
    ccv_nnc_cmd_ok(CCV_NNC_SMOOTH_L1_BACKWARD, CCV_NNC_BACKEND_GPU_REF));
93
1
  ccv_nnc_tensor_t* a = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
94
1
  ccv_nnc_tensor_t* b = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
95
1
  ccv_nnc_tensor_t* c = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10), 0);
96
1
  ccv_nnc_tensor_t* d = ccv_nnc_tensor_new(0, GPU_TENSOR_NHWC(000, 32F, 10, 100), 0);
97
1
  ccv_nnc_tensor_t* ha = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
98
1
  ccv_nnc_tensor_t* hb = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
99
1
  ccv_nnc_tensor_t* hc = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10), 0);
100
1
  ccv_nnc_tensor_t* hd = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
101
1
  dsfmt_t dsfmt;
102
1
  dsfmt_init_gen_rand(&dsfmt, 0);
103
1
  int i;
104
1.00k
  for (i = 0; i < 1000; 
i++1.00k
)
105
1.00k
    ha->data.f32[i] = dsfmt_genrand_open_close(&dsfmt) * 0.01;
106
1.00k
  for (i = 0; i < 1000; 
i++1.00k
)
107
1.00k
    hb->data.f32[i] = 0;
108
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(ha, hb), TENSOR_LIST(a, b), 0);
109
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_FORWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(ha, hb), TENSOR_LIST(hc), 0);
110
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_BACKWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(0, ha, hb, hc), TENSOR_LIST(hd), 0);
111
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_FORWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(a, b), TENSOR_LIST(c), 0);
112
1
  ccv_nnc_cmd_exec(CMD_SMOOTH_L1_BACKWARD(1), ccv_nnc_no_hint, 0, TENSOR_LIST(0, a, b, c), TENSOR_LIST(d), 0);
113
1
  ccv_nnc_tensor_t* td = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 10, 100), 0);
114
1
  ccv_nnc_cmd_exec(CMD_DATA_TRANSFER_FORWARD(), ccv_nnc_no_hint, 0, TENSOR_LIST(d), TENSOR_LIST(td), 0);
115
1
  REQUIRE_TENSOR_EQ(td, hd, "GPU computed output should be the same as CPU computed ones");
116
1
  ccv_nnc_tensor_free(a);
117
1
  ccv_nnc_tensor_free(b);
118
1
  ccv_nnc_tensor_free(c);
119
1
  ccv_nnc_tensor_free(d);
120
1
  ccv_nnc_tensor_free(ha);
121
1
  ccv_nnc_tensor_free(hb);
122
1
  ccv_nnc_tensor_free(hc);
123
1
  ccv_nnc_tensor_free(hd);
124
1
  ccv_nnc_tensor_free(td);
125
1
}
126
127
#include "case_main.h"