Coverage Report

Created: 2024-08-18 16:21

/home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/pad/ccv_nnc_pad.c
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#include "ccv.h"
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#include "nnc/ccv_nnc.h"
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#include "nnc/ccv_nnc_easy.h"
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#include "nnc/ccv_nnc_internal.h"
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static int _ccv_nnc_pad_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
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{
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  if ((input_bitmasks[0] & 1u) == 1u && output_bitmasks[0] == 1u)
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    return 1;
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  return 0;
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}
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static int _ccv_nnc_pad_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
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{
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  // We don't need the original input since roi align does averaging.
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  // We do, however, need the coordinate.
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  if ((input_bitmasks[0] & 1u) == (1u << 0) && output_bitmasks[0] == 1u)
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    return 1;
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  return 0;
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0
}
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static void _ccv_nnc_pad_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* outputs, const int output_size)
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{
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  assert(output_size == 1);
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  outputs[0] = inputs[0];
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  const int nd = ccv_nnc_tensor_nd(outputs[0].dim);
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  int i;
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  for (i = 0; i < nd; 
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)
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    outputs[0].dim[i] += cmd.size.dim[i] + cmd.pad.end[i];
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}
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static void _ccv_nnc_pad_tensor_auto_back(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* outputs, const int output_size)
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{
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  assert(output_size == 1);
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  outputs[0] = inputs[1];
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}
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REGISTER_COMMAND(CCV_NNC_PAD_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_pad_cpu_ref.c, gpu/ccv_nnc_pad_gpu_ref.cu, mps/ccv_nnc_pad_mps.m)
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{
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  registry->bitmask = _ccv_nnc_pad_forw_bitmask;
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  registry->tensor_auto = _ccv_nnc_pad_tensor_auto_forw;
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}
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REGISTER_COMMAND(CCV_NNC_PAD_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_pad_cpu_ref.c, gpu/ccv_nnc_pad_gpu_ref.cu, mps/ccv_nnc_pad_mps.m)
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{
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  registry->bitmask = _ccv_nnc_pad_back_bitmask;
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  registry->tensor_auto = _ccv_nnc_pad_tensor_auto_back;
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}
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_PAD_FORWARD)
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#define CMD_PAD_FORWARD(_type, _begin, _end) ccv_nnc_cmd(CCV_NNC_PAD_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={ESCAPE_X _begin}},.pad={.type=_type,.end={ESCAPE_X _end}}}), 0)
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_PAD_BACKWARD)
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#define CMD_PAD_BACKWARD(_type, _begin, _end) ccv_nnc_cmd(CCV_NNC_PAD_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={ESCAPE_X _begin}},.pad={.type=_type,.end={ESCAPE_X _end}}}), 0)