Coverage Report

Created: 2024-08-19 11:27

/home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/compare/ccv_nnc_cmp.c
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Source (jump to first uncovered line)
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#include "ccv.h"
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#include "ccv_internal.h"
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#include "nnc/ccv_nnc.h"
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#include "nnc/ccv_nnc_internal.h"
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#include "nnc/ccv_nnc_easy.h"
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static int _ccv_nnc_arbitary_inplace(const ccv_nnc_cmd_param_t cmd, const int input_idx, const int input_size, const int output_idx, const int output_size)
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{
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  return 1;
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}
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static int _ccv_nnc_cmp_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
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{
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  if ((input_bitmasks[0] & 3u) == ((1u << 0) | (1u << 1)) && output_bitmasks[0] == 1u)
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    return 1;
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  return 0;
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}
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static int _ccv_nnc_cmp_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
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{
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  // w.r.t. both x and y, either way, need gradient, input x, input y.
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  if ((input_bitmasks[0] & 7u) == 7u && output_bitmasks[0] == ((1u << 0) | (1u << 1)))
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    return 1;
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  return 0;
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}
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REGISTER_COMMAND(CCV_NNC_MIN_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_min_cpu_ref.c, gpu/ccv_nnc_min_gpu_ref.cu)
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{
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  registry->bitmask = _ccv_nnc_cmp_forw_bitmask;
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  registry->tensor_auto = ccv_nnc_hint_tensor_auto_forward_from_inputs;
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  registry->allow_inplace = _ccv_nnc_arbitary_inplace;
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}
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REGISTER_COMMAND(CCV_NNC_MIN_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_min_cpu_ref.c, gpu/ccv_nnc_min_gpu_ref.cu)
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{
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  registry->flags = CCV_NNC_CMD_ATTR_NULL_IS_ONES;
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  registry->bitmask = _ccv_nnc_cmp_back_bitmask;
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  registry->tensor_auto = ccv_nnc_hint_tensor_auto_backward_from_gradient;
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  registry->allow_inplace = _ccv_nnc_arbitary_inplace;
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}
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_MIN_FORWARD)
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#define CMD_MIN_FORWARD() ccv_nnc_cmd(CCV_NNC_MIN_FORWARD, 0, (ccv_nnc_cmd_param_t){.size={.dim={1,1,1}}}, 0)
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_MIN_BACKWARD)
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#define CMD_MIN_BACKWARD() ccv_nnc_cmd(CCV_NNC_MIN_BACKWARD, 0, (ccv_nnc_cmd_param_t){.size={.dim={1,1,1}}}, 0)
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REGISTER_COMMAND(CCV_NNC_MAX_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_max_cpu_ref.c, gpu/ccv_nnc_max_gpu_ref.cu)
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{
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  registry->bitmask = _ccv_nnc_cmp_forw_bitmask;
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  registry->tensor_auto = ccv_nnc_hint_tensor_auto_forward_from_inputs;
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  registry->allow_inplace = _ccv_nnc_arbitary_inplace;
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}
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REGISTER_COMMAND(CCV_NNC_MAX_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
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  FIND_BACKEND(ccv_nnc_max_cpu_ref.c, gpu/ccv_nnc_max_gpu_ref.cu)
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{
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  registry->flags = CCV_NNC_CMD_ATTR_NULL_IS_ONES;
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  registry->bitmask = _ccv_nnc_cmp_back_bitmask;
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  registry->tensor_auto = ccv_nnc_hint_tensor_auto_backward_from_gradient;
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  registry->allow_inplace = _ccv_nnc_arbitary_inplace;
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}
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_MAX_FORWARD)
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#define CMD_MAX_FORWARD() ccv_nnc_cmd(CCV_NNC_MAX_FORWARD, 0, (ccv_nnc_cmd_param_t){.size={.dim={1,1,1}}}, 0)
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//@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_MAX_BACKWARD)
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#define CMD_MAX_BACKWARD() ccv_nnc_cmd(CCV_NNC_MAX_BACKWARD, 0, (ccv_nnc_cmd_param_t){.size={.dim={1,1,1}}}, 0)