Coverage Report

Created: 2024-08-19 11:27

/home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/rand/ccv_nnc_rand_normal_cpu_ref.c
Line
Count
Source
1
#include "ccv.h"
2
#include "ccv_internal.h"
3
#include "nnc/ccv_nnc.h"
4
#include "nnc/ccv_nnc_easy.h"
5
#include "nnc/ccv_nnc_internal.h"
6
#include "3rdparty/dsfmt/dSFMT.h"
7
#ifdef USE_OPENMP
8
#include <omp.h>
9
#endif
10
#ifdef USE_DISPATCH
11
#include <dispatch/dispatch.h>
12
#endif
13
14
static int _ccv_nnc_random_normal(const ccv_nnc_cmd_t cmd, const ccv_nnc_hint_t hint, const int flags, ccv_nnc_tensor_t* const* const inputs, const int input_size, ccv_nnc_tensor_t* const* const outputs, const int output_size, ccv_nnc_stream_context_t* const stream_context)
15
1
{
16
1
  assert(output_size == 1);
17
1
  ccv_nnc_tensor_t* const a = outputs[0];
18
1
  assert(CCV_IS_TENSOR_CONTIGUOUS(a));
19
1
  const int count = ccv_nnc_tensor_count(a->info);
20
1
  int i;
21
1
  float* const ap = a->data.f32;
22
1
  dsfmt_t dsfmt;
23
1
  dsfmt_init_gen_rand(&dsfmt, ccv_nnc_stream_context_genrand_uint32(stream_context));
24
1
  const float std = cmd.info.blas.a[0];
25
1
  const float mean = cmd.info.blas.a[1];
26
50.0k
  for (i = 0; i < count + 1; 
i += 250.0k
)
27
50.0k
  {
28
50.0k
    const double r0 = 1.0 - dsfmt_genrand_close_open(&dsfmt);
29
50.0k
    const double r1 = dsfmt_genrand_close_open(&dsfmt);
30
50.0k
    const float mag = std * sqrt(-2.0 * log(r0));
31
50.0k
    const float z0  = mag * cos(CCV_PI * 2 * r1) + mean;
32
50.0k
    const float z1  = mag * sin(CCV_PI * 2 * r1) + mean;
33
50.0k
    ap[i] = z0;
34
50.0k
    if (i + 1 < count)
35
50.0k
      ap[i + 1] = z1;
36
50.0k
  }
37
1
  return CCV_NNC_EXEC_SUCCESS;
38
1
}
39
40
REGISTER_COMMAND_BACKEND(CCV_NNC_RANDOM_NORMAL_FORWARD, CCV_NNC_BACKEND_CPU_REF)(ccv_nnc_cmd_backend_registry_t* const registry)
41
1
{
42
1
  registry->tensor_formats = CCV_TENSOR_FORMAT_NHWC | CCV_TENSOR_FORMAT_NCHW | CCV_TENSOR_FORMAT_CHWN;
43
1
  registry->tensor_datatypes = CCV_32F;
44
1
  registry->tensor_memory = CCV_TENSOR_CPU_MEMORY;
45
1
  registry->algorithms = 1;
46
1
  registry->exec = _ccv_nnc_random_normal;
47
1
}
48
49
REGISTER_COMMAND_BACKEND(CCV_NNC_RANDOM_NORMAL_BACKWARD, CCV_NNC_BACKEND_CPU_REF)(ccv_nnc_cmd_backend_registry_t* const registry)
50
1
{
51
1
  registry->tensor_formats = CCV_TENSOR_FORMAT_NHWC | CCV_TENSOR_FORMAT_NCHW | CCV_TENSOR_FORMAT_CHWN;
52
1
  registry->tensor_datatypes = CCV_32F;
53
1
  registry->tensor_memory = CCV_TENSOR_CPU_MEMORY;
54
1
  registry->algorithms = 1;
55
1
  registry->exec = _ccv_nnc_random_normal;
56
1
}