/home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/scatter_add/ccv_nnc_scatter_add.c
Line | Count | Source |
1 | | #include "ccv.h" |
2 | | #include "nnc/ccv_nnc.h" |
3 | | #include "nnc/ccv_nnc_internal.h" |
4 | | |
5 | | static int _ccv_nnc_scatter_add_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size) |
6 | 2 | { |
7 | 2 | if ((input_bitmasks[0] & 3u) == 3u && output_bitmasks[0] == 1u) |
8 | 2 | return 1; |
9 | 0 | return 0; |
10 | 2 | } |
11 | | |
12 | | static int _ccv_nnc_scatter_add_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size) |
13 | 0 | { |
14 | 0 | if ((input_bitmasks[0] & 5u) == 5u && (output_bitmasks[0] & 1u) == 1u) |
15 | 0 | return 1; |
16 | 0 | return 0; |
17 | 0 | } |
18 | | |
19 | | static void _ccv_nnc_scatter_add_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* const inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* const outputs, const int output_size) |
20 | 3 | { |
21 | 3 | assert(input_size >= 2); |
22 | 3 | assert(output_size == 1); |
23 | 3 | outputs[0] = inputs[0]; |
24 | 3 | if (cmd.scatter_add.bincount > 0) |
25 | 3 | outputs[0].dim[0] = cmd.scatter_add.bincount; |
26 | 0 | else |
27 | 0 | outputs[0].dim[0] = inputs[1].dim[0]; |
28 | 3 | } |
29 | | |
30 | | REGISTER_COMMAND(CCV_NNC_SCATTER_ADD_FORWARD)(ccv_nnc_cmd_registry_t* const registry) |
31 | | FIND_BACKEND(ccv_nnc_scatter_add_cpu_ref.c, gpu/ccv_nnc_scatter_add_gpu_ref.cu, mps/ccv_nnc_scatter_add_mps.m) |
32 | 1 | { |
33 | 1 | registry->bitmask = _ccv_nnc_scatter_add_forw_bitmask; |
34 | 1 | registry->tensor_auto = _ccv_nnc_scatter_add_tensor_auto_forw; |
35 | 1 | } |
36 | | |
37 | | REGISTER_COMMAND(CCV_NNC_SCATTER_ADD_BACKWARD)(ccv_nnc_cmd_registry_t* const registry) |
38 | | FIND_BACKEND(ccv_nnc_scatter_add_cpu_ref.c, gpu/ccv_nnc_scatter_add_gpu_ref.cu, mps/ccv_nnc_scatter_add_mps.m) |
39 | 1 | { |
40 | 1 | registry->bitmask = _ccv_nnc_scatter_add_back_bitmask; |
41 | 1 | registry->tensor_auto = ccv_nnc_hint_tensor_auto_backward_from_gradient; // This is just best guess. |
42 | 1 | } |
43 | | |
44 | | //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_SCATTER_ADD_FORWARD) |
45 | | #define CMD_SCATTER_ADD_FORWARD(_bincount) ccv_nnc_cmd(CCV_NNC_SCATTER_ADD_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.scatter_add={.bincount=_bincount}}), 0) |
46 | | //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_SCATTER_ADD_BACKWARD) |
47 | | #define CMD_SCATTER_ADD_BACKWARD(_bincount) ccv_nnc_cmd(CCV_NNC_SCATTER_ADD_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.scatter_add={.bincount=_bincount}}), 0) |