## Coverage Report

#### Created: 2026-04-14 19:45

next uncovered line (L), next uncovered region (R), next uncovered branch (B)

    /home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/roi/ccv_nnc_roi_align.c

    Line
    Count
    Source
    1
    #include "ccv.h"
    2
    #include "nnc/ccv_nnc.h"
    3
    #include "nnc/ccv_nnc_easy.h"
    4
    #include "nnc/ccv_nnc_internal.h"
    5
    6
    static int _ccv_nnc_roi_align_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    7
    0
    {
    8
    0
      if ((input_bitmasks[0] & 3u) == 3u && output_bitmasks[0] == 1u)
    9
    0
        return 1;
    10
    0
      return 0;
    11
    0
    }
    12
    13
    static int _ccv_nnc_roi_align_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    14
    0
    {
    15
      // We don't need the original input since roi align does averaging.
    16
      // We do, however, need the coordinate.
    17
    0
      if ((input_bitmasks[0] & 5u) == ((1u << 0) | (0u << 1) | (1u << 2)) && output_bitmasks[0] == 1u)
    18
    0
        return 1;
    19
    0
      return 0;
    20
    0
    }
    21
    22
    static void _ccv_nnc_roi_align_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* outputs, const int output_size)
    23
    0
    {
    24
    0
      assert(output_size == 1);
    25
    0
      outputs[0] = inputs[0];
    26
    0
      const int hw = ccv_nnc_tensor_hw(outputs[0], ccv_nnc_tensor_nd(outputs[0].dim), CCV_NNC_MAX_DIM);
    27
    0
      assert(hw >= 0);
    28
    0
      outputs[0].dim[hw] = ccv_max(cmd.size.dim[0], 1);
    29
    0
      outputs[0].dim[hw + 1] = ccv_max(cmd.size.dim[1], 1);
    30
    0
    }
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    32
    static void _ccv_nnc_roi_align_tensor_auto_back(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* outputs, const int output_size)
    33
    0
    {
    34
    0
      assert(output_size == 1);
    35
    0
      outputs[0] = inputs[1];
    36
    0
    }
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    38
    REGISTER_COMMAND(CCV_NNC_ROI_ALIGN_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
    39
      FIND_BACKEND(ccv_nnc_roi_align_cpu_ref.c, gpu/ccv_nnc_roi_align_gpu_ref.cu)
    40
    1
    {
    41
    1
      registry->bitmask = _ccv_nnc_roi_align_forw_bitmask;
    42
    1
      registry->tensor_auto = _ccv_nnc_roi_align_tensor_auto_forw;
    43
    1
    }
    44
    45
    REGISTER_COMMAND(CCV_NNC_ROI_ALIGN_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
    46
      FIND_BACKEND(ccv_nnc_roi_align_cpu_ref.c, gpu/ccv_nnc_roi_align_gpu_ref.cu)
    47
    1
    {
    48
    1
      registry->bitmask = _ccv_nnc_roi_align_back_bitmask;
    49
    1
      registry->tensor_auto = _ccv_nnc_roi_align_tensor_auto_back;
    50
    1
    }
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    52
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_ROI_ALIGN_FORWARD)
    53
    #define CMD_ROI_ALIGN_FORWARD(rows, cols) ccv_nnc_cmd(CCV_NNC_ROI_ALIGN_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={rows, cols,1}}}), 0)
    54
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_ROI_ALIGN_BACKWARD)
    55
    #define CMD_ROI_ALIGN_BACKWARD(rows, cols) ccv_nnc_cmd(CCV_NNC_ROI_ALIGN_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={rows, cols,1}}}), 0)