## Coverage Report

#### Created: 2026-04-14 20:48

next uncovered line (L), next uncovered region (R), next uncovered branch (B)

    /home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/rmsprop/ccv_nnc_rmsprop.c

    Line
    Count
    Source
    1
    #include "ccv.h"
    2
    #include "nnc/ccv_nnc.h"
    3
    #include "nnc/ccv_nnc_internal.h"
    4
    5
    static int _ccv_nnc_rmsprop_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    6
    3
    {
    7
      // 4 inputs (gradient, x, momentum, squared gradient average)
    8
      // 3 outputs (y, new momentum, new squared gradient average)
    9
    3
      if (input_bitmasks[0] == 15u && output_bitmasks[0] == 7u1)
    10
    1
        return 1;
    11
    2
      return 0;
    12
    3
    }
    13
    14
    static int _ccv_nnc_rmsprop_allow_inplace(const ccv_nnc_cmd_param_t cmd, const int input_idx, const int input_size, const int output_idx, const int output_size)
    15
    12
    {
    16
    12
      if (input_idx == output_idx + 1)
    17
    3
        return 1;
    18
    9
      return 0;
    19
    12
    }
    20
    21
    static int _ccv_nnc_rmsprop_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    22
    0
    {
    23
      // Doesn't support.
    24
    0
      return 0;
    25
    0
    }
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    27
    static void _ccv_nnc_rmsprop_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* const inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* const outputs, const int output_size)
    28
    1
    {
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    1
      int i;
    30
    4
      for (i = 0; i < output_size; i++3)
    31
    3
        outputs[i] = inputs[0];
    32
    1
    }
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    34
    static void _ccv_nnc_rmsprop_tensor_auto_back(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* const inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* const outputs, const int output_size)
    35
    0
    {
    36
      // Doesn't support.
    37
    0
    }
    38
    39
    REGISTER_COMMAND(CCV_NNC_RMSPROP_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
    40
      FIND_BACKEND(ccv_nnc_rmsprop_cpu_ref.c, gpu/ccv_nnc_rmsprop_gpu_ref.cu)
    41
    1
    {
    42
    1
      registry->bitmask = _ccv_nnc_rmsprop_forw_bitmask;
    43
    1
      registry->tensor_auto = _ccv_nnc_rmsprop_tensor_auto_forw;
    44
    1
      registry->allow_inplace = _ccv_nnc_rmsprop_allow_inplace;
    45
    1
    }
    46
    47
    REGISTER_COMMAND(CCV_NNC_RMSPROP_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
    48
      FIND_BACKEND(ccv_nnc_rmsprop_cpu_ref.c, gpu/ccv_nnc_rmsprop_gpu_ref.cu)
    49
    1
    {
    50
    1
      registry->bitmask = _ccv_nnc_rmsprop_back_bitmask;
    51
    1
      registry->tensor_auto = _ccv_nnc_rmsprop_tensor_auto_back;
    52
    1
    }
    53
    54
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_RMSPROP_FORWARD)
    55
    #define CMD_RMSPROP_FORWARD(_rate, _decay, _alpha, _momentum, _epsilon) ccv_nnc_cmd(CCV_NNC_RMSPROP_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.rmsprop={.rate=_rate,.scale=1,.decay=_decay,.alpha=_alpha,.momentum=_momentum,.epsilon=_epsilon}}), 0)