## Coverage Report

#### Created: 2026-04-16 18:32

next uncovered line (L), next uncovered region (R), next uncovered branch (B)

    /home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/pool/ccv_nnc_pool.c

    Line
    Count
    Source
    1
    #include "ccv.h"
    2
    #include "nnc/ccv_nnc.h"
    3
    #include "nnc/ccv_nnc_easy.h"
    4
    #include "nnc/ccv_nnc_internal.h"
    5
    6
    static int _ccv_nnc_max_pool_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    7
    21
    {
    8
    21
      if ((input_bitmasks[0] & 1u) == 1u && output_bitmasks[0] == 1u)
    9
    21
        return 1;
    10
    0
      return 0;
    11
    21
    }
    12
    13
    static int _ccv_nnc_max_pool_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    14
    66
    {
    15
    66
      if ((input_bitmasks[0] & 7u) == ((1u << 0) | (1u << 1) | (1u << 2)) && output_bitmasks[0] == 1u17)
    16
    17
        return 1;
    17
    49
      return 0;
    18
    66
    }
    19
    20
    static void _ccv_nnc_pool_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* outputs, const int output_size)
    21
    1.10k
    {
    22
    1.10k
      assert(output_size == 1);
    23
    1.10k
      outputs[0] = inputs[0];
    24
    1.10k
      ccv_nnc_hint_tensor_forward(cmd, inputs[0], hint, outputs);
    25
    1.10k
    }
    26
    27
    static void _ccv_nnc_pool_tensor_auto_back(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* outputs, const int output_size)
    28
    933
    {
    29
    933
      assert(output_size == 1);
    30
    933
      outputs[0] = inputs[0];
    31
    933
      ccv_nnc_hint_tensor_backward(cmd, inputs[0], hint, outputs);
    32
    933
    }
    33
    34
    REGISTER_COMMAND(CCV_NNC_MAX_POOL_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
    35
      FIND_BACKEND(ccv_nnc_max_pool_cpu_ref.c, gpu/ccv_nnc_max_pool_gpu_cudnn.cu, mps/ccv_nnc_max_pool_mps.m)
    36
    1
    {
    37
    1
      registry->bitmask = _ccv_nnc_max_pool_forw_bitmask;
    38
    1
      registry->tensor_auto = _ccv_nnc_pool_tensor_auto_forw;
    39
    1
    }
    40
    41
    REGISTER_COMMAND(CCV_NNC_MAX_POOL_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
    42
      FIND_BACKEND(ccv_nnc_max_pool_cpu_ref.c, gpu/ccv_nnc_max_pool_gpu_cudnn.cu)
    43
    1
    {
    44
    1
      registry->bitmask = _ccv_nnc_max_pool_back_bitmask;
    45
    1
      registry->tensor_auto = _ccv_nnc_pool_tensor_auto_back;
    46
    1
    }
    47
    48
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_MAX_POOL_FORWARD)
    49
    #define CMD_MAX_POOL_FORWARD(rows, cols) ccv_nnc_cmd(CCV_NNC_MAX_POOL_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={rows, cols,1}}}), 0)
    50
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_MAX_POOL_BACKWARD)
    51
    #define CMD_MAX_POOL_BACKWARD(rows, cols) ccv_nnc_cmd(CCV_NNC_MAX_POOL_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={rows, cols,1}}}), 0)
    52
    53
    static int _ccv_nnc_avg_pool_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    54
    21
    {
    55
    21
      if ((input_bitmasks[0] & 1u) == 1u && output_bitmasks[0] == 1u)
    56
    21
        return 1;
    57
    0
      return 0;
    58
    21
    }
    59
    60
    static int _ccv_nnc_avg_pool_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    61
    96
    {
    62
    96
      if ((input_bitmasks[0] & 1u) == 1u && output_bitmasks[0] == 1u60)
    63
    60
        return 1;
    64
    36
      return 0;
    65
    96
    }
    66
    67
    REGISTER_COMMAND(CCV_NNC_AVERAGE_POOL_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
    68
      FIND_BACKEND(ccv_nnc_avg_pool_cpu_ref.c, gpu/ccv_nnc_avg_pool_gpu_cudnn.cu, mps/ccv_nnc_avg_pool_mps.m)
    69
    1
    {
    70
    1
      registry->bitmask = _ccv_nnc_avg_pool_forw_bitmask;
    71
    1
      registry->tensor_auto = _ccv_nnc_pool_tensor_auto_forw;
    72
    1
    }
    73
    74
    REGISTER_COMMAND(CCV_NNC_AVERAGE_POOL_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
    75
      FIND_BACKEND(ccv_nnc_avg_pool_cpu_ref.c, gpu/ccv_nnc_avg_pool_gpu_cudnn.cu)
    76
    1
    {
    77
    1
      registry->bitmask = _ccv_nnc_avg_pool_back_bitmask;
    78
    1
      registry->tensor_auto = _ccv_nnc_pool_tensor_auto_back;
    79
    1
    }
    80
    81
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_AVERAGE_POOL_FORWARD)
    82
    #define CMD_AVERAGE_POOL_FORWARD(rows, cols) ccv_nnc_cmd(CCV_NNC_AVERAGE_POOL_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={rows, cols,1}}}), 0)
    83
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_AVERAGE_POOL_BACKWARD)
    84
    #define CMD_AVERAGE_POOL_BACKWARD(rows, cols) ccv_nnc_cmd(CCV_NNC_AVERAGE_POOL_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={rows, cols,1}}}), 0)