## Coverage Report

#### Created: 2026-05-04 15:30

next uncovered line (L), next uncovered region (R), next uncovered branch (B)

    /home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/relu/ccv_nnc_relu.c

    Line
    Count
    Source
    1
    #include "ccv.h"
    2
    #include "nnc/ccv_nnc.h"
    3
    #include "nnc/ccv_nnc_internal.h"
    4
    5
    static int _ccv_nnc_relu_allow_first_replace(const ccv_nnc_cmd_param_t cmd, const int input_idx, const int input_size, const int output_idx, const int output_size)
    6
    337
    {
    7
    337
      return input_idx == 0 && output_idx == 0235;
    8
    337
    }
    9
    10
    static int _ccv_nnc_relu_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    11
    103
    {
    12
    103
      if ((input_bitmasks[0] & 1u) == 1u && output_bitmasks[0] == 1u)
    13
    103
        return 1;
    14
    0
      return 0;
    15
    103
    }
    16
    17
    static int _ccv_nnc_relu_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    18
    300
    {
    19
    300
      if ((input_bitmasks[0] & 5u) == ((1u << 0) | (1u << 2)) && output_bitmasks[0] == 1u104)
    20
    104
        return 1;
    21
    196
      return 0;
    22
    300
    }
    23
    24
    REGISTER_COMMAND(CCV_NNC_RELU_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
    25
      FIND_BACKEND(ccv_nnc_relu_cpu_ref.c, gpu/ccv_nnc_relu_gpu_cudnn.cu, mps/ccv_nnc_relu_mps.m)
    26
    1
    {
    27
    1
      registry->bitmask = _ccv_nnc_relu_forw_bitmask;
    28
    1
      registry->tensor_auto = ccv_nnc_hint_tensor_auto_forward_from_inputs;
    29
    1
      registry->allow_inplace = _ccv_nnc_relu_allow_first_replace;
    30
    1
    }
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    32
    REGISTER_COMMAND(CCV_NNC_RELU_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
    33
      FIND_BACKEND(ccv_nnc_relu_cpu_ref.c, gpu/ccv_nnc_relu_gpu_cudnn.cu, mps/ccv_nnc_relu_mps.m)
    34
    1
    {
    35
    1
      registry->bitmask = _ccv_nnc_relu_back_bitmask;
    36
    1
      registry->tensor_auto = ccv_nnc_hint_tensor_auto_backward_from_gradient;
    37
    1
      registry->allow_inplace = _ccv_nnc_relu_allow_first_replace;
    38
    1
    }
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    40
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_RELU_FORWARD)
    41
    #define CMD_RELU_FORWARD() ccv_nnc_cmd(CCV_NNC_RELU_FORWARD, 0, ccv_nnc_cmd_auto, 0)
    42
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_RELU_BACKWARD)
    43
    #define CMD_RELU_BACKWARD() ccv_nnc_cmd(CCV_NNC_RELU_BACKWARD, 0, ccv_nnc_cmd_auto, 0)