## Coverage Report

#### Created: 2026-05-04 15:30

next uncovered line (L), next uncovered region (R), next uncovered branch (B)

    /home/liu/actions-runner/_work/ccv/ccv/lib/nnc/cmd/sort/ccv_nnc_sort.c

    Line
    Count
    Source
    1
    #include "ccv.h"
    2
    #include "nnc/ccv_nnc.h"
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    #include "nnc/ccv_nnc_internal.h"
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    5
    static int _ccv_nnc_sort_forw_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    6
    4
    {
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    4
      if ((input_bitmasks[0] & 1u) == 1u && output_bitmasks[0] == 3u)
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    4
        return 1;
    9
    0
      return 0;
    10
    4
    }
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    12
    static int _ccv_nnc_sort_back_bitmask(const ccv_nnc_cmd_param_t cmd, const int input_size, const int output_size, const uint64_t* const input_bitmasks, const int input_bitmask_size, const uint64_t* const output_bitmasks, const int output_bitmask_size)
    13
    0
    {
    14
      // 10001
    15
    0
      if ((input_bitmasks[0] & 17u) == 17u && (output_bitmasks[0] & 1u) == 1u)
    16
    0
        return 1;
    17
    0
      return 0;
    18
    0
    }
    19
    20
    static void _ccv_nnc_sort_tensor_auto_forw(const ccv_nnc_cmd_param_t cmd, const ccv_nnc_tensor_param_t* const inputs, const int input_size, const ccv_nnc_hint_t hint, ccv_nnc_tensor_param_t* const outputs, const int output_size)
    21
    3
    {
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    3
      assert(input_size >= 1);
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    3
      assert(output_size == 2);
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    3
      outputs[0] = inputs[0];
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    3
      outputs[1] = outputs[0];
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    3
      outputs[1].datatype = CCV_32S;
    27
    3
    }
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    29
    REGISTER_COMMAND(CCV_NNC_SORT_FORWARD)(ccv_nnc_cmd_registry_t* const registry)
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      FIND_BACKEND(ccv_nnc_sort_cpu_ref.c, gpu/ccv_nnc_sort_gpu_ref.cu, mps/ccv_nnc_sort_mps.m)
    31
    1
    {
    32
    1
      registry->bitmask = _ccv_nnc_sort_forw_bitmask;
    33
    1
      registry->tensor_auto = _ccv_nnc_sort_tensor_auto_forw;
    34
    1
    }
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    36
    REGISTER_COMMAND(CCV_NNC_SORT_BACKWARD)(ccv_nnc_cmd_registry_t* const registry)
    37
      FIND_BACKEND(ccv_nnc_sort_cpu_ref.c, gpu/ccv_nnc_sort_gpu_ref.cu, mps/ccv_nnc_sort_mps.m)
    38
    1
    {
    39
    1
      registry->bitmask = _ccv_nnc_sort_back_bitmask;
    40
    1
      registry->tensor_auto = ccv_nnc_hint_tensor_auto_backward_from_gradient; // This is just best guess.
    41
    1
    }
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    43
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_SORT_FORWARD)
    44
    #define CMD_SORT_FORWARD(_along_axis, _descending) ccv_nnc_cmd(CCV_NNC_SORT_FORWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.sort={.along_axis=_along_axis,.descending=_descending}}), 0)
    45
    //@REGISTER_EASY_COMMAND_MACRO(CCV_NNC_SORT_BACKWARD)
    46
    #define CMD_SORT_BACKWARD(_along_axis, _descending) ccv_nnc_cmd(CCV_NNC_SORT_BACKWARD, 0, ((ccv_nnc_cmd_param_t){.size={.dim={1,1,1}},.sort={.along_axis=_along_axis,.descending=_descending}}), 0)