## Coverage Report

#### Created: 2026-05-04 15:30

next uncovered line (L), next uncovered region (R), next uncovered branch (B)

    /home/liu/actions-runner/_work/ccv/ccv/test/unit/nnc/pad.tests.c

    Line
    Count
    Source
    1
    #include "case.h"
    2
    #include "ccv_case.h"
    3
    #include "ccv_nnc_case.h"
    4
    #include <ccv.h>
    5
    #include <nnc/ccv_nnc.h>
    6
    #include <nnc/ccv_nnc_easy.h>
    7
    #include "3rdparty/dsfmt/dSFMT.h"
    8
    9
    TEST_SETUP()
    10
    {
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      ccv_nnc_init();
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    }
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    14
    TEST_CASE("implement pad zero")
    15
    {
    16
      ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 2, 3), 0);
    17
      ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 5, 4), 0);
    18
      a->data.f32[0] = 1;
    19
      a->data.f32[1] = 2;
    20
      a->data.f32[2] = 3;
    21
      a->data.f32[3] = 4;
    22
      a->data.f32[4] = 5;
    23
      a->data.f32[5] = 6;
    24
      ccv_nnc_cmd_exec(CMD_PAD_FORWARD(CCV_NNC_PAD_ZERO, (2, 1), (1, 0)), ccv_nnc_no_hint, 0, TENSOR_LIST(a), TENSOR_LIST(b), 0);
    25
      float btp[] = {
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        0, 0, 0, 0,
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        0, 0, 0, 0,
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        0, 1, 2, 3,
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        0, 4, 5, 6,
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        0, 0, 0, 0,
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      };
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      ccv_nnc_tensor_t bt = ccv_nnc_tensor(btp, CPU_TENSOR_NHWC(32F, 5, 4), 0);
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      REQUIRE_TENSOR_EQ(b, &bt, "result should be equal");
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      ccv_nnc_tensor_free(a);
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      ccv_nnc_tensor_free(b);
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    }
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    38
    TEST_CASE("implement pad replicate")
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    1
    {
    40
    1
      ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 2, 3), 0);
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    1
      ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 5, 5), 0);
    42
    1
      a->data.f32[0] = 1;
    43
    1
      a->data.f32[1] = 2;
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    1
      a->data.f32[2] = 3;
    45
    1
      a->data.f32[3] = 4;
    46
    1
      a->data.f32[4] = 5;
    47
    1
      a->data.f32[5] = 6;
    48
    1
      ccv_nnc_cmd_exec(CMD_PAD_FORWARD(CCV_NNC_PAD_REPLICATE, (2, 1), (1, 1)), ccv_nnc_no_hint, 0, TENSOR_LIST(a), TENSOR_LIST(b), 0);
    49
    1
      float btp[] = {
    50
    1
        1, 1, 2, 3, 3,
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    1
        1, 1, 2, 3, 3,
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    1
        1, 1, 2, 3, 3,
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    1
        4, 4, 5, 6, 6,
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    1
        4, 4, 5, 6, 6,
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    1
      };
    56
    1
      ccv_nnc_tensor_t bt = ccv_nnc_tensor(btp, CPU_TENSOR_NHWC(32F, 5, 5), 0);
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    1
      REQUIRE_TENSOR_EQ(b, &bt, "result should be equal");
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    1
      ccv_nnc_tensor_free(a);
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    1
      ccv_nnc_tensor_free(b);
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    1
    }
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    62
    TEST_CASE("implement pad reflect")
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    1
    {
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    1
      ccv_nnc_tensor_t* const a = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 3, 3), 0);
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    1
      ccv_nnc_tensor_t* const b = ccv_nnc_tensor_new(0, CPU_TENSOR_NHWC(32F, 5, 5), 0);
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    1
      a->data.f32[0] = 1;
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    1
      a->data.f32[1] = 2;
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    1
      a->data.f32[2] = 3;
    69
    1
      a->data.f32[3] = 4;
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    1
      a->data.f32[4] = 5;
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    1
      a->data.f32[5] = 6;
    72
    1
      a->data.f32[6] = 7;
    73
    1
      a->data.f32[7] = 8;
    74
    1
      a->data.f32[8] = 9;
    75
    1
      ccv_nnc_cmd_exec(CMD_PAD_FORWARD(CCV_NNC_PAD_REFLECT, (2, 1), (0, 1)), ccv_nnc_no_hint, 0, TENSOR_LIST(a), TENSOR_LIST(b), 0);
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    1
      float btp[] = {
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    1
        8, 7, 8, 9, 8,
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    1
        5, 4, 5, 6, 5,
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    1
        2, 1, 2, 3, 2,
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    1
        5, 4, 5, 6, 5,
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    1
        8, 7, 8, 9, 8,
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    1
      };
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    1
      ccv_nnc_tensor_t bt = ccv_nnc_tensor(btp, CPU_TENSOR_NHWC(32F, 5, 5), 0);
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    1
      REQUIRE_TENSOR_EQ(b, &bt, "result should be equal");
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    1
      ccv_nnc_tensor_free(a);
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    1
      ccv_nnc_tensor_free(b);
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    1
    }
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    89
    #include "case_main.h"